ASIC & FPGA Design House · Since 1999

From concept to silicon, without surprises.

ASICS.ws designs, verifies and delivers digital silicon — storage controllers, USB, post-quantum cryptography, compression and error-correction IP, and complete custom ASICs on any fabrication process. More than 80% of our business comes from returning customers.

25+
Years of design experience
80%
Business from returning customers
55+
Commercial & free IP cores
Any
Fabrication process supported

Everything between the idea and the chip

We cover the full design cycle — from the initial conceptual idea to the final product — with economical, on-schedule solutions and manufacturing connections in Southeast Asia.

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Design Specification

We turn your concept into a complete, unambiguous specification your whole team can build against.

⌨️

HDL Coding

Clean, synthesizable Verilog and VHDL, written for reuse and easy customization.

Verification

Thorough test benches and test vectors so problems are found in simulation, not in silicon.

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Synthesis

Timing-clean netlists targeting your FPGA family or ASIC process, with scripts included.

FPGA Prototyping

Working hardware early — validate the design at speed before committing to masks.

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Complete Prototypes & Manufacturing

System prototyping through fabrication, delivered as a finished, tested product.

Production-proven commercial IP

Every core ships with documentation, a full test bench and synthesis scripts — and most can be customized to fit your exact requirements.

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SATA I/II/III Host Controller

531 MB/s reads, 66K IOPS, NCQ and port-multiplier support. SATA v3.0 compliance certified.

6 GbpsCertified
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SAS Recorder & Initiator

High-speed data recording and multi-port initiation at up to 12 Gbps per port, with hardware-managed command sequencing.

12 GbpsAXI Stream
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AES Crypt Engine

Up to 8 independent engines delivering over 2.4 GB/s. ECB, CBC and XTS modes with BitLocker acceleration.

>2.4 GB/sXTS
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USB 3.0 & 2.0 Device

SuperSpeed 5 Gbit/s connectivity with integrated DMA and up to 16 endpoints. USB 2.0 cores are compliance certified.

5 GbpsCertified
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Post-Quantum Cryptography

ML-KEM (FIPS 203), ML-DSA (FIPS 204), SLH-DSA (FIPS 205) and Falcon/FN-DSA key-encapsulation and signature accelerators, verified against official NIST ACVP vectors.

New 2026FIPS 203–205
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Forward Error Correction

LDPC with complete 5G NR, Wi-Fi, DVB-S2 and CCSDS coding chains, configurable BCH encode/decode, and Reed-Solomon cores including 2.5 Gbps GPON FEC.

5G NRLDPC · BCH · RS

Open Silicon

The first company to give away IP cores — and still doing it

We pioneered free, open IP cores with full source, documentation and test benches. Typical commercial cores sell well above the $100,000 mark; we believe you should be able to evaluate real RTL before you spend anything.

  • 25+ free cores — USB, crypto, DSP, FPU, memory controllers, video and more
  • Modified BSD license — use them in commercial products
  • Full technical support available for most cores featured on OpenCores

USB 2.0 Device

480 Mbps compliant controller with UTMI interface.

Verilog

AES (Rijndael)

Compact crypto core sized for low-cost FPGAs.

Verilog

IEEE-754 FPU

Single-precision, 4-stage pipeline: add, sub, mul, div.

Verilog

Mini-RISC MCU

PIC16C57-compatible microcontroller core.

Verilog

Company news

  • Post-quantum cryptography IP cores released

    ML-KEM (FIPS 203), ML-DSA (FIPS 204), SLH-DSA (FIPS 205) and Falcon/FN-DSA key-encapsulation and signature accelerators join the security portfolio.

  • LDPC, BCH and OFDM IP cores released

    5G NR / Wi-Fi / DVB-S2 / CCSDS forward error correction, a configurable BCH encoder/decoder, and a complete OFDM baseband transceiver.

  • HMAC Core and Keccak/SHA-3/SHAKE IP Core released

    Two new authentication and hashing cores join our security portfolio.

  • AES, HASH and ZLIB IP Cores launched

    Multi-engine encryption, MD5/SHA hashing and hardware ZLIB compression.

  • Custom ASIC design and fabrication services expanded

    Design services from RTL through packaged parts, on any fabrication process.

  • SAS Recorder IP Core released

    High-speed data recording at up to 12 Gbps per port.

Certified & recognized

Our cores don't just simulate — they pass official compliance programs. We are members of the Xilinx AllianceCORE and Xilinx Xperts programs, and a Design & Reuse partner.

SEPT 2010

Xilinx AllianceCORE Partnership

JUNE 2010

SATA Compliance Certification

JUNE 2005

USB 2.0 HS-OTG Certification

Member

Xilinx AllianceCORE Program

Member

Xilinx Xperts Program

Partner

Design & Reuse

Some of our clients

From semiconductor leaders to aerospace and defense primes — a selection of the companies that build with our IP cores and design services.

Advantest
Agilent Technologies
Altera
AstroNova
Booz Allen Hamilton
Curtiss-Wright
Drobo
DRS Technologies
Fluke
Fraunhofer
Guidance Software / EnCase
Honeywell
ICR
Intel
MBDA Missile Systems
MegaChips
Motorola Solutions
NDT Global
Northrop
OpenText
QinetiQ
Raytheon
RUAG
Saab
SAIC
Sony
Toshiba
Vanguard Rugged Storage
X2E
Xilinx

Have a chip to build?

Tell us what you need — a single core, a full custom ASIC, or anything in between. Accurate quotes, accurate schedules, no hidden costs.

Contact us — info@asics.ws